The invention relates generally to semiconductor devices and systems for designing and fabricating such devices, particularly to improving device layout and detection of a novel layout, that is, a layout that differs from known layouts.
Due to inherent difficulties in sub-resolution lithography and modeling of resist processes, the risk of patterns which fail (either by short circuits, opens, or parametric failure) is substantially increased compared to the historical record. The standard industry practice of design rules checking (DRC) has become very difficult to implement due to the number and complexity of required rules and strong possibility that they are either too restrictive for efficient design or fail to detect patterns which will fail. In many cases these patterns will be novel (different from what is known), and thus not known to be handled by the existing process stack and/or resolution enhancement techniques, such as optical proximity correction (OPC). One proposed conservative approach to the layout rules problem is to restrict the allowable local patterns to a set which were previously demonstrated to be manufacturable, at least in a given shape context, on a test site or by rigorous simulation. A pattern is defined as a local region or window of layout, with the window size typically matched to an underlying routing or device grid and width up to a typical “optical radius,” within which the strongest influence of proximity effects on a layout are contained. Subsequent design layouts U must be scanned and compared with the known pattern library L, which, for a large number of layout patterns, yields a matching or distance operation with a complexity L*U, in a naïve implementation. Hierarchical cluster or tree matching can reduce this, but, especially for automatically routed layout systems with window sizes approaching the optical radius, the number of existing patterns on the new layout U can be quite large. For example, projections of a number of unique patterns based on layout scans of ungridded 22 nanometer data for optical radius sized windows can be as high as 500 million. As a result of these large numbers of patterns and associated computations, processor load for conventional distance-based matching techniques is very high, and might require runtime of distance-based novelty detection on the order of a CPU year.